Details
Originalsprache | Englisch |
---|---|
Titel des Sammelwerks | 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016 |
Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers Inc. |
ISBN (elektronisch) | 9781509004935 |
Publikationsstatus | Veröffentlicht - 1 Juni 2016 |
Extern publiziert | Ja |
Veranstaltung | 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016 - Lisbon, Portugal Dauer: 27 Juni 2016 → 30 Juni 2016 |
Publikationsreihe
Name | 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016 |
---|
Abstract
Size and cost of a boost converter can be minimized by reducing the voltage overshoot and fastening the transient response in case of load transient. The presented technique improves the transient response of a current mode controlled boost converter, which usually suffers from bandwidth limitation because of its right-half-plane zero (RHPZ). The proposed technique comprises a load current estimation which works as part of a digital controller without any additional measurements. Based on the latest load estimation the controller parameters are adapted, achieving small voltage overshoot and fast transient response. The presented technique was implemented in a digital control circuit, consisting of an ASIC in a 110 nm-technology, a Xilinx Spartan-6 field programmable gate array (FPGA), and a TI-ADS8422 analog-to-digital-converter (ADC). Simulation and measurements of a 4V-to-6.3V, 500mA boost converter show an improvement of 50% in voltage overshoot and response time to load transient.
ASJC Scopus Sachgebiete
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
Zitieren
- Standard
- Harvard
- Apa
- Vancouver
- BibTex
- RIS
2016 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7519468 (2016 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - Boost converter with load dependent adaptive controller for improved transient response
AU - Quenzer-Hohmuth, Samuel
AU - Ritzmann, Steffen
AU - Rosahl, Thoralf
AU - Wicht, Bernhard
N1 - Publisher Copyright: © 2016 IEEE.
PY - 2016/6/1
Y1 - 2016/6/1
N2 - Size and cost of a boost converter can be minimized by reducing the voltage overshoot and fastening the transient response in case of load transient. The presented technique improves the transient response of a current mode controlled boost converter, which usually suffers from bandwidth limitation because of its right-half-plane zero (RHPZ). The proposed technique comprises a load current estimation which works as part of a digital controller without any additional measurements. Based on the latest load estimation the controller parameters are adapted, achieving small voltage overshoot and fast transient response. The presented technique was implemented in a digital control circuit, consisting of an ASIC in a 110 nm-technology, a Xilinx Spartan-6 field programmable gate array (FPGA), and a TI-ADS8422 analog-to-digital-converter (ADC). Simulation and measurements of a 4V-to-6.3V, 500mA boost converter show an improvement of 50% in voltage overshoot and response time to load transient.
AB - Size and cost of a boost converter can be minimized by reducing the voltage overshoot and fastening the transient response in case of load transient. The presented technique improves the transient response of a current mode controlled boost converter, which usually suffers from bandwidth limitation because of its right-half-plane zero (RHPZ). The proposed technique comprises a load current estimation which works as part of a digital controller without any additional measurements. Based on the latest load estimation the controller parameters are adapted, achieving small voltage overshoot and fast transient response. The presented technique was implemented in a digital control circuit, consisting of an ASIC in a 110 nm-technology, a Xilinx Spartan-6 field programmable gate array (FPGA), and a TI-ADS8422 analog-to-digital-converter (ADC). Simulation and measurements of a 4V-to-6.3V, 500mA boost converter show an improvement of 50% in voltage overshoot and response time to load transient.
UR - http://www.scopus.com/inward/record.url?scp=84992116105&partnerID=8YFLogxK
U2 - 10.1109/prime.2016.7519468
DO - 10.1109/prime.2016.7519468
M3 - Conference contribution
AN - SCOPUS:84992116105
T3 - 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016
BT - 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016
Y2 - 27 June 2016 through 30 June 2016
ER -