Details
| Original language | English |
|---|---|
| Title of host publication | EUSAR 2024 - 15th European Conference on Synthetic Aperture Radar |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 44-49 |
| Number of pages | 6 |
| ISBN (electronic) | 9783800762873 |
| Publication status | Published - 2024 |
| Event | 15th European Conference on Synthetic Aperture Radar, EUSAR 2024 - Munich, Germany Duration: 23 Apr 2024 → 26 Apr 2024 |
Publication series
| Name | Proceedings of the European Conference on Synthetic Aperture Radar, EUSAR |
|---|---|
| ISSN (Print) | 2197-4403 |
Abstract
Synthetic Aperture Radar on board of small UAVs (“drones”) could enable a new field of applications. Due to their unstable flight path, autofocus processing is often required to generate usable images in this context. To enable real-time on-board processing high performance and energy-efficient hardware is required. This paper reports on an FPGA implementation of the Backprojection Autofocus algorithm using a specialized numeric optimization method called Parallel Autofocus Optimization. The hardware design is analyzed for throughput and power consumption. Results show that autofocus processing requires 36.5× the time and 24.7× the energy on our implementation, compared to Backprojection processing alone.
ASJC Scopus subject areas
- Computer Science(all)
- Signal Processing
- Physics and Astronomy(all)
- Instrumentation
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EUSAR 2024 - 15th European Conference on Synthetic Aperture Radar. Institute of Electrical and Electronics Engineers Inc., 2024. p. 44-49 (Proceedings of the European Conference on Synthetic Aperture Radar, EUSAR).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - An Optimized FPGA Implementation of SAR Backprojection Autofocus
AU - Rother, Niklas
AU - Fahnemann, Christian
AU - Blume, Holger
N1 - Publisher Copyright: © VDE VERLAG GMBH ∙ Berlin ∙ Offenbach.
PY - 2024
Y1 - 2024
N2 - Synthetic Aperture Radar on board of small UAVs (“drones”) could enable a new field of applications. Due to their unstable flight path, autofocus processing is often required to generate usable images in this context. To enable real-time on-board processing high performance and energy-efficient hardware is required. This paper reports on an FPGA implementation of the Backprojection Autofocus algorithm using a specialized numeric optimization method called Parallel Autofocus Optimization. The hardware design is analyzed for throughput and power consumption. Results show that autofocus processing requires 36.5× the time and 24.7× the energy on our implementation, compared to Backprojection processing alone.
AB - Synthetic Aperture Radar on board of small UAVs (“drones”) could enable a new field of applications. Due to their unstable flight path, autofocus processing is often required to generate usable images in this context. To enable real-time on-board processing high performance and energy-efficient hardware is required. This paper reports on an FPGA implementation of the Backprojection Autofocus algorithm using a specialized numeric optimization method called Parallel Autofocus Optimization. The hardware design is analyzed for throughput and power consumption. Results show that autofocus processing requires 36.5× the time and 24.7× the energy on our implementation, compared to Backprojection processing alone.
UR - http://www.scopus.com/inward/record.url?scp=85193943732&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:85193943732
T3 - Proceedings of the European Conference on Synthetic Aperture Radar, EUSAR
SP - 44
EP - 49
BT - EUSAR 2024 - 15th European Conference on Synthetic Aperture Radar
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 15th European Conference on Synthetic Aperture Radar, EUSAR 2024
Y2 - 23 April 2024 through 26 April 2024
ER -