Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
| Seiten | 7-12 |
| Seitenumfang | 6 |
| ISBN (elektronisch) | 9781728157757 |
| Publikationsstatus | Veröffentlicht - 2020 |
Publikationsreihe
| Name | Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI |
|---|---|
| Band | 2020-July |
| ISSN (Print) | 2159-3469 |
| ISSN (elektronisch) | 2159-3477 |
Abstract
In this paper, we propose a new methodology for equivalence checking in the AMS domain. On top of comparing two existing approaches, we define a new methodology using continuous reachable sets. The approaches are illustrated upon two existing abstract modeling techniques. Moreover, the generated models are compared against a conformant model that captures the measured system behavior from the real circuit. These modeling methodologies yield hybrid automatons (HAs), which along with the netlist, are compared using different equivalence checking methods demonstrating verification techniques on different abstraction levels. Finally, we discuss the methodologies with respect to an efficient and safe circuit design.
ASJC Scopus Sachgebiete
- Informatik (insg.)
- Hardware und Architektur
- Ingenieurwesen (insg.)
- Steuerungs- und Systemtechnik
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
Zitieren
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- BibTex
- RIS
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 2020. S. 7-12 9154965 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Band 2020-July).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - Equivalence Checking Methods for Analog Circuits Using Continuous Reachable Sets.
AU - Tarraf, Ahmad
AU - Hedrich, Lars
AU - Kochdumper, Niklas
AU - Rechmal-Lesse, Malgorzata
AU - Olbrich, Markus
PY - 2020
Y1 - 2020
N2 - In this paper, we propose a new methodology for equivalence checking in the AMS domain. On top of comparing two existing approaches, we define a new methodology using continuous reachable sets. The approaches are illustrated upon two existing abstract modeling techniques. Moreover, the generated models are compared against a conformant model that captures the measured system behavior from the real circuit. These modeling methodologies yield hybrid automatons (HAs), which along with the netlist, are compared using different equivalence checking methods demonstrating verification techniques on different abstraction levels. Finally, we discuss the methodologies with respect to an efficient and safe circuit design.
AB - In this paper, we propose a new methodology for equivalence checking in the AMS domain. On top of comparing two existing approaches, we define a new methodology using continuous reachable sets. The approaches are illustrated upon two existing abstract modeling techniques. Moreover, the generated models are compared against a conformant model that captures the measured system behavior from the real circuit. These modeling methodologies yield hybrid automatons (HAs), which along with the netlist, are compared using different equivalence checking methods demonstrating verification techniques on different abstraction levels. Finally, we discuss the methodologies with respect to an efficient and safe circuit design.
KW - AMS verification
KW - Behavioral modeling
KW - Coverage
KW - Equivalence checking
KW - Hybrid automata
KW - Reachability
UR - http://www.scopus.com/inward/record.url?scp=85090407694&partnerID=8YFLogxK
U2 - 10.1109/isvlsi49217.2020.00012
DO - 10.1109/isvlsi49217.2020.00012
M3 - Conference contribution
SN - 978-1-7281-5776-4
T3 - Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
SP - 7
EP - 12
BT - 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
ER -