3-D placement considering vertical interconnects

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Autorschaft

  • I. Kaya
  • M. Olbrich
  • E. Barke

Organisationseinheiten

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Details

OriginalspracheEnglisch
Titel des SammelwerksProceedings - IEEE International SOC Conference, SOCC 2003
Herausgeber/-innenDong S. Ha, Richard Auletta, John Chickanosky
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers Inc.
Seiten257-258
Seitenumfang2
ISBN (elektronisch)0780381823, 9780780381827
PublikationsstatusVeröffentlicht - 2003
VeranstaltungIEEE International SOC Conference, SOCC 2003 - Portland, USA / Vereinigte Staaten
Dauer: 17 Sept. 2003 → 20 Sept. 2003

Publikationsreihe

NameProceedings - IEEE International SOC Conference, SOCC 2003

Abstract

3D integration is going to play an important role in the future. Increasing complexity and increasing impact of interconnects to integrated circuit (IC) performance makes 3D more and more attractive. EDA tools for 3D design hardly exist. We propose a new 3D standard-cell placer based on quadratic programming. It ensures a reduction of the total wirelength and can deal with standard cells and vertical interconnects simultaneously. The final result is a legalized, design rule compliant and discrete 3D placement.

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3-D placement considering vertical interconnects. / Kaya, I.; Olbrich, M.; Barke, E.
Proceedings - IEEE International SOC Conference, SOCC 2003. Hrsg. / Dong S. Ha; Richard Auletta; John Chickanosky. Institute of Electrical and Electronics Engineers Inc., 2003. S. 257-258 1241509 (Proceedings - IEEE International SOC Conference, SOCC 2003).

Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review

Kaya, I, Olbrich, M & Barke, E 2003, 3-D placement considering vertical interconnects. in DS Ha, R Auletta & J Chickanosky (Hrsg.), Proceedings - IEEE International SOC Conference, SOCC 2003., 1241509, Proceedings - IEEE International SOC Conference, SOCC 2003, Institute of Electrical and Electronics Engineers Inc., S. 257-258, IEEE International SOC Conference, SOCC 2003, Portland, USA / Vereinigte Staaten, 17 Sept. 2003. https://doi.org/10.1109/SOC.2003.1241509
Kaya, I., Olbrich, M., & Barke, E. (2003). 3-D placement considering vertical interconnects. In D. S. Ha, R. Auletta, & J. Chickanosky (Hrsg.), Proceedings - IEEE International SOC Conference, SOCC 2003 (S. 257-258). Artikel 1241509 (Proceedings - IEEE International SOC Conference, SOCC 2003). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SOC.2003.1241509
Kaya I, Olbrich M, Barke E. 3-D placement considering vertical interconnects. in Ha DS, Auletta R, Chickanosky J, Hrsg., Proceedings - IEEE International SOC Conference, SOCC 2003. Institute of Electrical and Electronics Engineers Inc. 2003. S. 257-258. 1241509. (Proceedings - IEEE International SOC Conference, SOCC 2003). doi: 10.1109/SOC.2003.1241509
Kaya, I. ; Olbrich, M. ; Barke, E. / 3-D placement considering vertical interconnects. Proceedings - IEEE International SOC Conference, SOCC 2003. Hrsg. / Dong S. Ha ; Richard Auletta ; John Chickanosky. Institute of Electrical and Electronics Engineers Inc., 2003. S. 257-258 (Proceedings - IEEE International SOC Conference, SOCC 2003).
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Download

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