SmartHeaP- A High-level Programmable and Customized Hearing Aid System on Chip Integrated in a Research Hearing Aid Prototype

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Authors

External Research Organisations

  • Cadence Design Systems
  • Sonova Consumer Hearing GmbH
  • Hörzentrum Oldenburg gGmbH
  • Global Foundries, Inc.
  • Fraunhofer Institute for Digital Media Technology (IDMT)
  • Dream Chip Technologies GmbH
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Details

Original languageEnglish
JournalIEEE Transactions on Biomedical Circuits and Systems
Publication statusE-pub ahead of print - 2024

Abstract

Hearing loss is one of the most common sensory deficiencies. Hearing aids with adaptable personalized signal processing can further enhance the social lives of those affected. To investigate the degree of possible improvements,high-level programmable,low-power,and portable behind-the-ear (BTE) research platforms are needed to conduct studies in the real world and not just in the laboratory. However,as the hearing aid market is very restrictive and,to the best of our knowledge,no research platforms in BTE size are available,this paper presents a fully embedded hearing aid prototype in a BTE form factor as one of the contributions. The device integrates wireless interfaces such as Bluetooth Low Energy (BLE) and Near Field Magnetic Induction (NFMI). Despite its small size and weight of only 5 grams,it can be used for studies lasting up to nine hours with state-of-the-art hearing algorithms. As a key component to achieve this low power consumption while executing these computationally demanding algorithms,this paper presents a newly designed Smart Hearing Aid Processor (SmartHeaP) System on Chip (SoC). It is a mixed-signal and application-specific integrated circuit (ASIC) with an adaptive body bias (ABB) unit fabricated in 22nm fully-depleted silicon-on-insulator (FD-SOI) technology. Furthermore,the SoC integrates two application-specific instruction set processors (ASIPs) designed using virtual prototyping approaches. The SoC is high-level pro- grammable and tailored to hearing aid applications,capable of running,e.g.,a binaural beamformer with a power consumption of 1.45 mW @ 5 MHz.

Keywords

    22nm FD-SOI, ASIC, ASIP, Hearing Aid, Instruction Extension, Low Power, MATLAB, Research Platform, System on Chip (SoC), Tensilica, Virtual Prototype

ASJC Scopus subject areas

Sustainable Development Goals

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title = "SmartHeaP- A High-level Programmable and Customized Hearing Aid System on Chip Integrated in a Research Hearing Aid Prototype",
abstract = "Hearing loss is one of the most common sensory deficiencies. Hearing aids with adaptable personalized signal processing can further enhance the social lives of those affected. To investigate the degree of possible improvements,high-level programmable,low-power,and portable behind-the-ear (BTE) research platforms are needed to conduct studies in the real world and not just in the laboratory. However,as the hearing aid market is very restrictive and,to the best of our knowledge,no research platforms in BTE size are available,this paper presents a fully embedded hearing aid prototype in a BTE form factor as one of the contributions. The device integrates wireless interfaces such as Bluetooth Low Energy (BLE) and Near Field Magnetic Induction (NFMI). Despite its small size and weight of only 5 grams,it can be used for studies lasting up to nine hours with state-of-the-art hearing algorithms. As a key component to achieve this low power consumption while executing these computationally demanding algorithms,this paper presents a newly designed Smart Hearing Aid Processor (SmartHeaP) System on Chip (SoC). It is a mixed-signal and application-specific integrated circuit (ASIC) with an adaptive body bias (ABB) unit fabricated in 22nm fully-depleted silicon-on-insulator (FD-SOI) technology. Furthermore,the SoC integrates two application-specific instruction set processors (ASIPs) designed using virtual prototyping approaches. The SoC is high-level pro- grammable and tailored to hearing aid applications,capable of running,e.g.,a binaural beamformer with a power consumption of 1.45 mW @ 5 MHz.",
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author = "Jens Karrenbauer and Sven Schonewald and Simon Klein and Frederik Kautz and Kamil Adiloglu and Claudia Kretzschmar and Tobias Bruns and Bluethgen, {Hans Martin} and Meinolf Blawat and Jens Benndorf and Holger Blume",
note = "Publisher Copyright: {\textcopyright} 2007-2012 IEEE.",
year = "2024",
doi = "10.1109/TBCAS.2024.3481044",
language = "English",
journal = "IEEE Transactions on Biomedical Circuits and Systems",
issn = "1932-4545",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

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T1 - SmartHeaP- A High-level Programmable and Customized Hearing Aid System on Chip Integrated in a Research Hearing Aid Prototype

AU - Karrenbauer, Jens

AU - Schonewald, Sven

AU - Klein, Simon

AU - Kautz, Frederik

AU - Adiloglu, Kamil

AU - Kretzschmar, Claudia

AU - Bruns, Tobias

AU - Bluethgen, Hans Martin

AU - Blawat, Meinolf

AU - Benndorf, Jens

AU - Blume, Holger

N1 - Publisher Copyright: © 2007-2012 IEEE.

PY - 2024

Y1 - 2024

N2 - Hearing loss is one of the most common sensory deficiencies. Hearing aids with adaptable personalized signal processing can further enhance the social lives of those affected. To investigate the degree of possible improvements,high-level programmable,low-power,and portable behind-the-ear (BTE) research platforms are needed to conduct studies in the real world and not just in the laboratory. However,as the hearing aid market is very restrictive and,to the best of our knowledge,no research platforms in BTE size are available,this paper presents a fully embedded hearing aid prototype in a BTE form factor as one of the contributions. The device integrates wireless interfaces such as Bluetooth Low Energy (BLE) and Near Field Magnetic Induction (NFMI). Despite its small size and weight of only 5 grams,it can be used for studies lasting up to nine hours with state-of-the-art hearing algorithms. As a key component to achieve this low power consumption while executing these computationally demanding algorithms,this paper presents a newly designed Smart Hearing Aid Processor (SmartHeaP) System on Chip (SoC). It is a mixed-signal and application-specific integrated circuit (ASIC) with an adaptive body bias (ABB) unit fabricated in 22nm fully-depleted silicon-on-insulator (FD-SOI) technology. Furthermore,the SoC integrates two application-specific instruction set processors (ASIPs) designed using virtual prototyping approaches. The SoC is high-level pro- grammable and tailored to hearing aid applications,capable of running,e.g.,a binaural beamformer with a power consumption of 1.45 mW @ 5 MHz.

AB - Hearing loss is one of the most common sensory deficiencies. Hearing aids with adaptable personalized signal processing can further enhance the social lives of those affected. To investigate the degree of possible improvements,high-level programmable,low-power,and portable behind-the-ear (BTE) research platforms are needed to conduct studies in the real world and not just in the laboratory. However,as the hearing aid market is very restrictive and,to the best of our knowledge,no research platforms in BTE size are available,this paper presents a fully embedded hearing aid prototype in a BTE form factor as one of the contributions. The device integrates wireless interfaces such as Bluetooth Low Energy (BLE) and Near Field Magnetic Induction (NFMI). Despite its small size and weight of only 5 grams,it can be used for studies lasting up to nine hours with state-of-the-art hearing algorithms. As a key component to achieve this low power consumption while executing these computationally demanding algorithms,this paper presents a newly designed Smart Hearing Aid Processor (SmartHeaP) System on Chip (SoC). It is a mixed-signal and application-specific integrated circuit (ASIC) with an adaptive body bias (ABB) unit fabricated in 22nm fully-depleted silicon-on-insulator (FD-SOI) technology. Furthermore,the SoC integrates two application-specific instruction set processors (ASIPs) designed using virtual prototyping approaches. The SoC is high-level pro- grammable and tailored to hearing aid applications,capable of running,e.g.,a binaural beamformer with a power consumption of 1.45 mW @ 5 MHz.

KW - 22nm FD-SOI

KW - ASIC

KW - ASIP

KW - Hearing Aid

KW - Instruction Extension

KW - Low Power

KW - MATLAB

KW - Research Platform

KW - System on Chip (SoC)

KW - Tensilica

KW - Virtual Prototype

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U2 - 10.1109/TBCAS.2024.3481044

DO - 10.1109/TBCAS.2024.3481044

M3 - Article

AN - SCOPUS:85207447038

JO - IEEE Transactions on Biomedical Circuits and Systems

JF - IEEE Transactions on Biomedical Circuits and Systems

SN - 1932-4545

ER -

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