Details
Original language | English |
---|---|
Title of host publication | 2018 Pan Pacific Microelectronics Symposium, Pan Pacific 2018 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1-7 |
Number of pages | 7 |
ISBN (electronic) | 9781944543044 |
Publication status | Published - 15 Mar 2018 |
Event | 2018 Pan Pacific Microelectronics Symposium, Pan Pacific 2018 - Big Island, United States Duration: 5 Feb 2018 → 8 Feb 2018 |
Abstract
The downscaling in VLSI systems and the use of new materials requires the development of new test structures and in the case of harsh environment conditions the change of the test conditions to higher applied currents and test temperatures. Furthermore the application in wider operating areas and more challenging mission profiles leads to a concept of highly robust metallization stacks [1] in a metal stack system up to eight levels. These stacks can contain a thick top metallization track for high current or RF application. Looking on the metallization systems of liners and cap materials as well as the current carrying metal themselves the differences in the coefficient of thermal expansion (CTE) of the materials lead to intrinsic tension and can result in fatal delamination of the metallization. Different failure mechanisms and complicate interaction of effects in the operating area can result. The reliability of thick metal tracks is still not in focus of considerations. But the mechanical stability especially at chip corner and edge as well as local higher electromigration (EM) can be critical. With the help of finite element analysis the thermal-electrical-mechanical behavior of metallization systems and new design concepts can be investigated. Furthermore migration effects can be analyzed and a comparison of simulated and obtained behavior can be done and support reliability assessment.
Keywords
- Metallization, Migration, Reliability, Simulation, Thick metal
ASJC Scopus subject areas
- Materials Science(all)
- Electronic, Optical and Magnetic Materials
- Computer Science(all)
- Hardware and Architecture
- Engineering(all)
- Electrical and Electronic Engineering
- Engineering(all)
- Safety, Risk, Reliability and Quality
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2018 Pan Pacific Microelectronics Symposium, Pan Pacific 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-7.
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - Process, geometry and stack related reliability of thick ALCU-metal-tracks
AU - Weide-Zaage, Kirsten
AU - Hein, Verena
N1 - Publisher Copyright: © 2018 SMTA. Copyright: Copyright 2018 Elsevier B.V., All rights reserved.
PY - 2018/3/15
Y1 - 2018/3/15
N2 - The downscaling in VLSI systems and the use of new materials requires the development of new test structures and in the case of harsh environment conditions the change of the test conditions to higher applied currents and test temperatures. Furthermore the application in wider operating areas and more challenging mission profiles leads to a concept of highly robust metallization stacks [1] in a metal stack system up to eight levels. These stacks can contain a thick top metallization track for high current or RF application. Looking on the metallization systems of liners and cap materials as well as the current carrying metal themselves the differences in the coefficient of thermal expansion (CTE) of the materials lead to intrinsic tension and can result in fatal delamination of the metallization. Different failure mechanisms and complicate interaction of effects in the operating area can result. The reliability of thick metal tracks is still not in focus of considerations. But the mechanical stability especially at chip corner and edge as well as local higher electromigration (EM) can be critical. With the help of finite element analysis the thermal-electrical-mechanical behavior of metallization systems and new design concepts can be investigated. Furthermore migration effects can be analyzed and a comparison of simulated and obtained behavior can be done and support reliability assessment.
AB - The downscaling in VLSI systems and the use of new materials requires the development of new test structures and in the case of harsh environment conditions the change of the test conditions to higher applied currents and test temperatures. Furthermore the application in wider operating areas and more challenging mission profiles leads to a concept of highly robust metallization stacks [1] in a metal stack system up to eight levels. These stacks can contain a thick top metallization track for high current or RF application. Looking on the metallization systems of liners and cap materials as well as the current carrying metal themselves the differences in the coefficient of thermal expansion (CTE) of the materials lead to intrinsic tension and can result in fatal delamination of the metallization. Different failure mechanisms and complicate interaction of effects in the operating area can result. The reliability of thick metal tracks is still not in focus of considerations. But the mechanical stability especially at chip corner and edge as well as local higher electromigration (EM) can be critical. With the help of finite element analysis the thermal-electrical-mechanical behavior of metallization systems and new design concepts can be investigated. Furthermore migration effects can be analyzed and a comparison of simulated and obtained behavior can be done and support reliability assessment.
KW - Metallization
KW - Migration
KW - Reliability
KW - Simulation
KW - Thick metal
UR - http://www.scopus.com/inward/record.url?scp=85050758812&partnerID=8YFLogxK
U2 - 10.23919/panpacific.2018.8319008
DO - 10.23919/panpacific.2018.8319008
M3 - Conference contribution
AN - SCOPUS:85050758812
SP - 1
EP - 7
BT - 2018 Pan Pacific Microelectronics Symposium, Pan Pacific 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 Pan Pacific Microelectronics Symposium, Pan Pacific 2018
Y2 - 5 February 2018 through 8 February 2018
ER -