Details
Original language | English |
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Title of host publication | CASES '09: Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems |
Pages | 167-174 |
Number of pages | 8 |
Publication status | Published - Jan 2009 |
Externally published | Yes |
Event | Embedded Systems Week 2009, ESWEEK 2009 - 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES'09 - Grenoble, France Duration: 11 Oct 2009 → 16 Oct 2009 |
Abstract
A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks that are implemented as threads. This problem is termed rate-monotonic priority inversion, and current software-based solutions are restricted in terms of more sophisticated scheduler features as demanded for instance by the AUTOSAR embedded-operating-system specification. We propose a hardware-based approach that makes use of a coprocessor to eliminate the potential priority inversion. By evaluating a prototypical implementation, we show that our approach both overcomes the restrictions of software approaches and introduces only a slight processing overhead in exchange for increased predictability.
Keywords
- CiAO, Interrupt handling, Priority-driven, Rate-monotonic priority inversion, Real-time systems, TriCore
ASJC Scopus subject areas
- Computer Science(all)
- Hardware and Architecture
- Computer Science(all)
- Software
- Engineering(all)
- Electrical and Electronic Engineering
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CASES '09: Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems. 2009. p. 167-174.
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - Parallel, Hardware-Supported Interrupt Handling in an Event-Triggered Real-Time Operating System
AU - Scheler, Fabian
AU - Hofer, Wanja
AU - Oechslein, Benjamin
AU - Pfister, Rudi
AU - Schröder-Preikschat, Wolfgang
AU - Lohmann, Daniel
PY - 2009/1
Y1 - 2009/1
N2 - A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks that are implemented as threads. This problem is termed rate-monotonic priority inversion, and current software-based solutions are restricted in terms of more sophisticated scheduler features as demanded for instance by the AUTOSAR embedded-operating-system specification. We propose a hardware-based approach that makes use of a coprocessor to eliminate the potential priority inversion. By evaluating a prototypical implementation, we show that our approach both overcomes the restrictions of software approaches and introduces only a slight processing overhead in exchange for increased predictability.
AB - A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks that are implemented as threads. This problem is termed rate-monotonic priority inversion, and current software-based solutions are restricted in terms of more sophisticated scheduler features as demanded for instance by the AUTOSAR embedded-operating-system specification. We propose a hardware-based approach that makes use of a coprocessor to eliminate the potential priority inversion. By evaluating a prototypical implementation, we show that our approach both overcomes the restrictions of software approaches and introduces only a slight processing overhead in exchange for increased predictability.
KW - CiAO
KW - Interrupt handling
KW - Priority-driven
KW - Rate-monotonic priority inversion
KW - Real-time systems
KW - TriCore
UR - http://www.scopus.com/inward/record.url?scp=72049108716&partnerID=8YFLogxK
U2 - 10.1145/1629395.1629419
DO - 10.1145/1629395.1629419
M3 - Conference contribution
AN - SCOPUS:72049108716
SN - 9781605586267
SP - 167
EP - 174
BT - CASES '09: Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
T2 - Embedded Systems Week 2009, ESWEEK 2009 - 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES'09
Y2 - 11 October 2009 through 16 October 2009
ER -