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Hierarchical software locking

Research output: Patent

Inventors

  • Jonathan Ross (Inventor)
  • Ronald Aigner (Inventor)
  • Jan S. Rellermeyer (Inventor)
  • Jork Loeser (Inventor)

External Research Organisations

  • Microsoft Research

Details

Original languageEnglish
Patent numberUS8468169B2
IPCG06F9/526
Priority date1 Dec 2010
Filing date1 Dec 2010
Publication statusAccepted/In press - 18 Jun 2013

Abstract

A processor chip may have a built-in hardware lock and deterministic exclusive locking of the hardware lock by execution units executing in parallel on the chip. A set of software locks may be maintained, where the execution units set and release the software locks only by first acquiring a lock of the hardware lock. A first execution unit sets a software lock after acquiring a lock of the hardware lock, and other execution units, even if exclusively locking the hardware lock, are unable to lock the software lock until after the first execution unit has reacquired a lock of the hardware lock and possibly released the software lock while exclusively locking the hardware lock. An execution unit may release a software lock after and while holding a lock of the hardware lock. The hardware lock is released when a software lock has been set or released.

Cite this

Hierarchical software locking. / Ross, Jonathan (Inventor); Aigner, Ronald (Inventor); Rellermeyer, Jan S. (Inventor) et al.
Patent No.: US8468169B2. Jun 18, 2013.

Research output: Patent

Ross J, Aigner R, Rellermeyer JS, Loeser J, inventors. Hierarchical software locking. US8468169B2. 2013 Jun 18.
Ross, Jonathan (Inventor) ; Aigner, Ronald (Inventor) ; Rellermeyer, Jan S. (Inventor) et al. / Hierarchical software locking. Patent No.: US8468169B2. Jun 18, 2013.
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