Publications
2022
- Published
A Survey on Application Specific Processor Architectures for Digital Hearing Aids
Gerlach, L. K., Payá Vayá, G. & Blume, H. C., Nov 2022, In: Journal of Signal Processing Systems. 94, 11, p. 1293-1308 16 p.Research output: Contribution to journal › Article › Research › peer review
2020
- Published
Multicore performance prediction with MPET: Using scalability characteristics for statistical cross-architecture prediction
Arndt, O. J., Lüders, M., Riggers, C. & Blume, H., Sept 2020, In: Journal of Signal Processing Systems. 92, 9, p. 981-998 18 p.Research output: Contribution to journal › Article › Research › peer review
- Published
Evolutionary Algorithms for Instruction Scheduling, Operation Merging, and Register Allocation in VLIW Compilers
Giesemann, F., Gerlach, L. & Payá-Vayá, G., Jul 2020, In: Journal of Signal Processing Systems. 92, 7, p. 655-678 24 p.Research output: Contribution to journal › Article › Research › peer review
2015
- Published
Analyzing the Performance-Hardware Trade-off of an ASIP-based SIFT Feature Extraction
Mentzer, N., Payá-Vayá, G. & Blume, H., 11 May 2015, In: Journal of Signal Processing Systems. 85, 1, p. 83-99 17 p.Research output: Contribution to journal › Article › Research › peer review
2009
- Published
A multi-shared register file structure for VLIW processors
Payá-Vayá, G., Martín-Langerwerf, J. & Pirsch, P., 20 Mar 2009, In: Journal of Signal Processing Systems. 58, 2, p. 215-231 17 p.Research output: Contribution to journal › Article › Research › peer review
2008
- External
Introduction to the Special Issue on SAMOS 2007
Blume, H., Gaydadjiev, G. & Glossner, J., 12 Jun 2008, In: Journal of Signal Processing Systems. 57, 1, p. 1-3 3 p.Research output: Contribution to journal › Editorial in journal › Research › peer review
- External
Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPs
Neumann, B., Von Sydow, T., Blume, H. & Noll, T. G., 20 May 2008, In: Journal of Signal Processing Systems. 53, 1, p. 129-143 15 p.Research output: Contribution to journal › Article › Research › peer review
2006
- External
A Case Study for the Application of Deterministic and Stochastic Petri Nets in the SoC Communication Domain
Blume, H., Von Sydow, T. & Noll, T. G., 1 Jun 2006, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 43, 2, p. 223-233 11 p.Research output: Contribution to journal › Article › Research › peer review
2005
- Published
A platform-independent methodology for performance estimation of multimedia signal processing applications
Stolberg, H. J., Bereković, M. & Pirsch, P., 1 Sept 2005, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 41, 2, p. 139-151 13 p.Research output: Contribution to journal › Article › Research › peer review
- Published
HiBRID-SoC: A multi-core SoC architecture for multimedia signal processing
Stolberg, H. J., Bereković, M., Moch, S., Friebe, L., Kulaczewski, M. B., Flügel, S., Klußmann, H., Dehnhardt, A. & Pirsch, P., 1 Aug 2005, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 41, 1, p. 9-20 12 p.Research output: Contribution to journal › Article › Research › peer review
- External
Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip
Blume, H., Feldkaemper, H. T. & Noll, T., 1 May 2005, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 40, 1, p. 19-34 16 p.Research output: Contribution to journal › Article › Research › peer review
- Published
Model-based exploration of the design space for heterogeneous systems on chip
Blume, H., Feldkaemper, H. & Noll, T., 2005, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology.Research output: Contribution to journal › Article › Research › peer review
2002
- Published
Architecture of an image rendering co-processor for MPEG-4 visual compositing
Berekovic, M., Pirsch, P., Selinger, T., Wels, K. I., Miro, C., Lafage, A., Heer, C. & Ghigo, G., 1 Jul 2002, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 31, 2, p. 157-171 15 p.Research output: Contribution to journal › Article › Research › peer review
- External
Embedding of Dedicated High-Performance ASICs into Reconfigurable Systems Providing Additional Multimedia Functionality
Blume, H., Blüthgen, H. M., Henning, C., Osterloh, P. & Noll, T. G., Jun 2002, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 31, 2, p. 117-126 10 p.Research output: Contribution to journal › Article › Research › peer review
2001
- Published
Architecture Concepts for Multimedia Signal Processing
Pirsch, P., Reuter, C., Wittenburg, J. P., Kulaczewski, M. B. & Stolberg, H. J., 1 Nov 2001, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 29, 3, p. 157-165 9 p.Research output: Contribution to journal › Article › Research › peer review
1999
- Published
Instruction Set Extensions for MPEG-4 Video
Berekovic, M., Stolberg, H. J., Kulaczewski, M. B., Pirsch, P., Möller, H., Runge, H., Kneip, J. & Stabernack, B., 1 Oct 1999, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 23, 1, p. 27-49 23 p.Research output: Contribution to journal › Article › Research › peer review
- External
Hardware realization of a Java Virtual Machine for high performance multimedia applications
Berekovic, M., Kloos, H. & Pirsch, P., 1 Aug 1999, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 22, 1, p. 31-43 13 p.Research output: Contribution to journal › Article › Research › peer review
1998
- External
Animated Talking Head with Personalized 3D Head Model
Ostermann, J., Chen, L. S. & Huang, T. S., 1 Oct 1998, In: Journal of signal processing systems for signal, image, and video technology. 20, 1-2, p. 97-105 9 p.Research output: Contribution to journal › Article › Research › peer review
- Published
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors
Berekovic, M., Pirsch, P. & Kneip, J., 1998, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 20, 1-2, p. 163-180 18 p.Research output: Contribution to journal › Article › Research › peer review
1997
- Published
An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor
Kneip, J., Berekovic, M., Wittenburg, J. P., Hinrichs, W. & Pirsch, P., 1997, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 16, 1, p. 31-40 10 p.Research output: Contribution to journal › Article › Research › peer review
1995
- Published
The LISA design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques
Schönfeld, M., Franzen, J., Schwiegershausen, M., Pirsch, P., Vehlies, U. & Münzner, A., 1 Oct 1995, In: Journal of VLSI Signal Processing. 11, 1-2, p. 51-74 24 p.Research output: Contribution to journal › Article › Research › peer review
1993
- Published
A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications
Gaedke, K., Jeschke, H. & Pirsch, P., 1 Apr 1993, In: Journal of VLSI Signal Processing. 5, 2-3, p. 159-169 11 p.Research output: Contribution to journal › Article › Research › peer review
- Published
A defect-tolerant systolic array implementation for real time image processing
Hecht, V., Rönner, K. & Pirsch, P., 1 Jan 1993, In: Journal of VLSI Signal Processing. 5, 1, p. 37-47 11 p.Research output: Contribution to journal › Article › Research › peer review