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IEEE Transactions on Very Large Scale Integration (VLSI) Systems

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Publications

  1. 2008

  2. External

    A Scalable Packet Sorting Circuit for High-Speed WFQ Packet Scheduling

    McLaughlin, K., Sezer, S., Blume, H., Yang, X., Kupzog, F. & Noll, T., Jul 2008, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 16, 7, p. 781-791 11 p.

    Research output: Contribution to journal › Article › Research › peer review

  3. Published

    A scalable packet sorting circuit for high-speed WFQ packet scheduling

    McLaughlin, K., Sezer, S., Blume, H., Yang, X., Kupzog, F. & Noll, T., 2008, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

    Research output: Contribution to journal › Article › Research › peer review