TY - JOUR

T1 - Electrical characterization and modelling of n-n Ge-Si heterojunctions with relatively low interface state densities

AU - Peibst, R.

AU - Rugeramigabo, E. P.

AU - Hofmann, K. R.

N1 - Funding information: We would like to thank T. Wietler, O. Kerker, D. Wang, and M. Beste for their help with sample processing and for valuable discussions, and E. Bugiel for the TEM investigations. This work was funded by Deutsche Forschungsgemeinschaft under Grant HO 1885/14.

PY - 2012/12/1

Y1 - 2012/12/1

N2 - We investigated the electrical behavior of n-n Ge-Si isotype heterojunction diodes prepared by surfactant-mediated epitaxy of relaxed n-Ge layers on (100) n-Si substrates. Current-voltage characteristics were measured at different temperatures between 10 ° C and 90 ° C. The experimental results were interpreted with a new heterojunction model based on Shockley-Read-Hall kinetics for electron and hole capture/emission at the interface traps, which describes the bias dependent interface and semiconductor charges, the trap-mediated currents, and the thermionic electron transmission current. The modeled thermionic electron emission current was in excellent agreement with the experimental current-voltage characteristics in the whole temperature range for negative (≥-0.5 V) and positive (≤0.1 V) Ge biases. Trap-mediated currents were much smaller for reasonable trap capture cross sections σ ≤ 10 - 14 cm2. From the experimental data, we extracted an electron barrier height of 0.59 eV at room temperature and an effective density of interface traps of only 5 · 10 12 cm - 2 eV - 1 near the Si midgap. The charge carrier exchange between these traps with the Ge side was found to be much more efficient than with the Si side. The presence of a hole inversion layer at the interface proved to be essential for the interpretation of the heterojunction characteristics.

AB - We investigated the electrical behavior of n-n Ge-Si isotype heterojunction diodes prepared by surfactant-mediated epitaxy of relaxed n-Ge layers on (100) n-Si substrates. Current-voltage characteristics were measured at different temperatures between 10 ° C and 90 ° C. The experimental results were interpreted with a new heterojunction model based on Shockley-Read-Hall kinetics for electron and hole capture/emission at the interface traps, which describes the bias dependent interface and semiconductor charges, the trap-mediated currents, and the thermionic electron transmission current. The modeled thermionic electron emission current was in excellent agreement with the experimental current-voltage characteristics in the whole temperature range for negative (≥-0.5 V) and positive (≤0.1 V) Ge biases. Trap-mediated currents were much smaller for reasonable trap capture cross sections σ ≤ 10 - 14 cm2. From the experimental data, we extracted an electron barrier height of 0.59 eV at room temperature and an effective density of interface traps of only 5 · 10 12 cm - 2 eV - 1 near the Si midgap. The charge carrier exchange between these traps with the Ge side was found to be much more efficient than with the Si side. The presence of a hole inversion layer at the interface proved to be essential for the interpretation of the heterojunction characteristics.

UR - http://www.scopus.com/inward/record.url?scp=84886814879&partnerID=8YFLogxK

U2 - 10.1063/1.4768255

DO - 10.1063/1.4768255

M3 - Article

AN - SCOPUS:84886814879

VL - 112

JO - Journal of applied physics

JF - Journal of applied physics

SN - 0021-8979

IS - 12

M1 - 124502

ER -