Details
| Original language | English |
|---|---|
| Pages (from-to) | 699-716 |
| Number of pages | 18 |
| Journal | Journal of Materials Research |
| Volume | 32 |
| Issue number | 4 |
| Early online date | 8 Feb 2017 |
| Publication status | Published - 28 Feb 2017 |
Abstract
Epitaxial layers of insulating binary lanthanide oxides have been considered as potential alternative to conventional SiO2 for gate dielectric application in future Si-based MOSFET devices, which was investigated in more detail for epitaxial Gd2O3 and Nd2O3 as model systems. Additionally, the ability to integrate epitaxial dielectric barrier layers into Si structures can usher also in a variety of novel applications involving oxide/silicon/oxide heterostructures in diverse nanoelectronic and quantum-effect devices. Although epitaxial layers of such ionic oxides with excellent structural quality can be grown using molecular beam epitaxy, they often exhibit poor electrical properties such as high leakage current density, flat band instability, poor reliability etc. owing to the presence of electrically active charge defects, generated either during the oxide layer growth or typical subsequent CMOS process steps. Based on the origin and individual character of these defects, we review various aspects of defect prevention and passivation which lead to a significant improvement in the dielectric properties of the heterostructures.
ASJC Scopus subject areas
- Materials Science(all)
- General Materials Science
- Physics and Astronomy(all)
- Condensed Matter Physics
- Engineering(all)
- Mechanics of Materials
- Engineering(all)
- Mechanical Engineering
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In: Journal of Materials Research, Vol. 32, No. 4, 28.02.2017, p. 699-716.
Research output: Contribution to journal › Article › Research › peer review
}
TY - JOUR
T1 - Epitaxial lanthanide oxide thin films on Si for high-k gate dielectric application
T2 - Growth optimization and defect passivation
AU - Roy Chaudhuri, Ayan
AU - Fissel, Andreas
AU - Osten, Hans-Jörg
N1 - Publisher Copyright: © Materials Research Society 2017. Copyright: Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2017/2/28
Y1 - 2017/2/28
N2 - Epitaxial layers of insulating binary lanthanide oxides have been considered as potential alternative to conventional SiO2 for gate dielectric application in future Si-based MOSFET devices, which was investigated in more detail for epitaxial Gd2O3 and Nd2O3 as model systems. Additionally, the ability to integrate epitaxial dielectric barrier layers into Si structures can usher also in a variety of novel applications involving oxide/silicon/oxide heterostructures in diverse nanoelectronic and quantum-effect devices. Although epitaxial layers of such ionic oxides with excellent structural quality can be grown using molecular beam epitaxy, they often exhibit poor electrical properties such as high leakage current density, flat band instability, poor reliability etc. owing to the presence of electrically active charge defects, generated either during the oxide layer growth or typical subsequent CMOS process steps. Based on the origin and individual character of these defects, we review various aspects of defect prevention and passivation which lead to a significant improvement in the dielectric properties of the heterostructures.
AB - Epitaxial layers of insulating binary lanthanide oxides have been considered as potential alternative to conventional SiO2 for gate dielectric application in future Si-based MOSFET devices, which was investigated in more detail for epitaxial Gd2O3 and Nd2O3 as model systems. Additionally, the ability to integrate epitaxial dielectric barrier layers into Si structures can usher also in a variety of novel applications involving oxide/silicon/oxide heterostructures in diverse nanoelectronic and quantum-effect devices. Although epitaxial layers of such ionic oxides with excellent structural quality can be grown using molecular beam epitaxy, they often exhibit poor electrical properties such as high leakage current density, flat band instability, poor reliability etc. owing to the presence of electrically active charge defects, generated either during the oxide layer growth or typical subsequent CMOS process steps. Based on the origin and individual character of these defects, we review various aspects of defect prevention and passivation which lead to a significant improvement in the dielectric properties of the heterostructures.
UR - http://www.scopus.com/inward/record.url?scp=85011899073&partnerID=8YFLogxK
U2 - 10.1557/jmr.2017.22
DO - 10.1557/jmr.2017.22
M3 - Article
AN - SCOPUS:85011899073
VL - 32
SP - 699
EP - 716
JO - Journal of Materials Research
JF - Journal of Materials Research
SN - 0884-2914
IS - 4
ER -